A focused collection of questions on Vlsi Design to sharpen your skills for technical interviews.
Setup and Hold Time in sequential circuits
the purpose of Static Timing Analysis (STA)
Blocking vs. Non-Blocking assignments in Verilog
the concept of Impedance Matching
the trade-offs between an FPGA and an ASIC
the basic CMOS Inverter
different Logic Families (CMOS, TTL, ECL)
the purpose of a Smith Chart
Setup and Hold Time in sequential circuits
the purpose of Static Timing Analysis (STA)
Blocking vs. Non-Blocking assignments in Verilog
the concept of Impedance Matching
the trade-offs between an FPGA and an ASIC
the basic CMOS Inverter
different Logic Families (CMOS, TTL, ECL)
the purpose of a Smith Chart